T1 Circuit actual throughput 1290Kbp

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1

(!) The cell tax is about 10% -- the SAR expands user data from 48
bytes to 53 bytes, plus an additional amount of overhead for internal
fragmentation on the final cell (AAL-5), plus overhead for whatever
encapsulation mode is being used.

The cell tax is actually about 20%, based on the traces of the backbone IP
traffic. Reason for this is the additional overhead imposed of partially filled cells.

Fixwest 960926:

total packets seen = 15315121, total payload bytes seen = 4276560002
ATM framing bytes = 5155881287 ATM efficiency = 82.95%
ATM w/snap framing bytes = 5387212772 ATM w/snap efficiency = 79.38%

Funet 970608:

total packets seen = 6699991, total payload bytes seen = 2336213700
ATM framing bytes = 2783454053 ATM efficiency = 83.93%
ATM w/snap framing bytes = 2919019891 ATM w/snap efficiency = 80.03%

Pasi

2

>(!) The cell tax is about 10% -- the SAR expands user data from 48
>bytes to 53 bytes, plus an additional amount of overhead for internal
>fragmentation on the final cell (AAL-5), plus overhead for whatever
>encapsulation mode is being used.

The cell tax is actually about 20%, based on the traces of the backbone IP
traffic. Reason for this is the additional overhead imposed of partially =
filled cells.

That's what I meant about internal fragmentation. Depending on frame
size, it can be a non-trivial part of the overhead. If we assume
null-VC encapsulation and 256 byte packets, this is 1 cell partially
filled (20 bytes average ((48-8)/2)) for every 5 full cells, or an
additional 9.7% overhead. (Which matches up nicely with your
measurements. ;-))