Well, i do not think that using off-the-shelf cheapo CPUs debugged by
somebody else and tested in millions of applications, instead of
single-purpose ASICs qualifies as a reliability hit or a development lag
Agreed that the part itself is correct. However, unlike you, the rest of
us tend to take perfect parts and make mistakes putting them together.
Ah, i do a lot of mistakes. Anyway, it's much easier to put together
debugged parts, than put together new silicon. I've had more than
enough of that at nCUBE.